Superhero Blog

June Conferences: DAC and Symposium on VLSI Technology and Circuits

By Brian Bailey on April 24, 2012

173 comments

Before we know it, it will be summer and that means conferences.

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Power integrity -- How much does it matter?

By Brian Bailey on April 17, 2012

141 comments

If you have been following my month of power over on the EE Times EDA Designline, you will know that I have been featuring books that tackle the subject of power integrity.

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Time to rethink EDA flows and tool infrastructure

By Brian Bailey on April 5, 2012

156 comments

Recently, I have had the pleasure of talking to a number of entrepreneurs within the EDA space and got to hear some of their concerns and recommendations for people thinking about starting a new company.

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Functional verification concepts have to change

By Brian Bailey on March 15, 2012

142 comments

Last week was DVCon, probably the best conference of the year for those interested in functional verification.

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Analog Bits appear everywhere in the chip

By Brian Bailey on February 28, 2012

150 comments

Last week I had the pleasure of talking to Mahesh Tirupattur, executive VP at Analog Bits. I have to admit that I had never heard of Analog Bits before, but the talk was quite enlightening.

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Speed kills when it comes to printed circuit boards or chips

By Brian Bailey on February 13, 2012

113 comments

Speed kills, and when we are talking about printed circuit boards or chips, this is caused by distance.

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An interesting trend with EDA books

By Brian Bailey on January 23, 2012

143 comments

Several EDA companies have been busy writing books recently and self-publishing them. Synopsys was the first to start this trend and many of their books have been co-written with their partners. A recent example was the "FPGA-Based Prototyping Methodology Manual," written by Doug Amos and Rene Richter of Synopsys, and Austin Lesea of Xilinx.

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EDA industry predictions for 2012

By Brian Bailey on January 11, 2012

142 comments

Each year, there are plenty of predictions being floated around by the industry pundits and for this year I will follow the Chinese proverb that says: a wise man once said nothing.

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Random problems associated with small geometries

By Brian Bailey on December 19, 2011

123 comments

There were many alarms being rung, when features sizes were around 90 nm, about how smaller geometries were going to create a new set of issues.

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ESL: The value of abstraction

By Brian Bailey on December 7, 2011

105 comments

I know I am as bad as other proponents for ESL, saying that abstraction is the key to almost everything and provides additional productivity, the ability to handle greater complexity, simulations run orders of magnitude faster, in fact the list of advantages is almost endless. But how often do we stop and question why this is the case and what could go wrong?

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